HCL Group
A Memory Layout Engineer designs and develops memory blocks for integrated circuits, focusing on efficient layouts that meet performance, power, and area constraints. The role involves creating bit cell arrays, decoders, and sense amplifiers while ensuring compliance with Design for Manufacturability and Design for Yield requirements. Candidates will utilize physical verification tools and scripting languages to analyze layouts for signal integrity and power issues.
HCL Group is a pioneering Indian conglomerate established in 1976, recognized as one of India's original IT garage start-ups and an early innovator in modern computing. The Group operates a portfolio of companies spanning technology services (HCLTech), software products (HCLSoftware), healthcare solutions (HCL Healthcare), IT distribution (HCL Infosystems), and online education (HCL GUVI). It also invests in philanthropy, sports, and music through various strategic programs and foundations.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for HCL Group.
HCL Group didn’t post a salary, so this is our estimate from similar listings.
35% below the average for this role