Senior DFT Engineer

Cadence Solutions

1 year ago

Bangalore, India

Onsite

Full Time

Senior

0 applicants

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About this role

A SoC/ASIC Digital Design Engineer at Cadence is responsible for working on Design for Test (DFT) aspects, including scan chain insertion and automatic test pattern generation. The role requires collaboration with cross-functional teams and a focus on quality metrics for effective pattern generation, ensuring high design test coverage and fault analysis.

Skills

Qualifications

Department of Defense Clearance

About Cadence Solutions

cadence.care

Cadence is a remote patient monitoring company that delivers scalable chronic disease management to improve health outcomes and generate financial ROI. Their solution combines connected devices, data analytics, and clinician‑led care pathways to continuously monitor patients, reduce hospitalizations, and drive better clinical outcomes. Cadence partners with health systems, payers, and employers to implement turnkey RPM programs at scale, and its model has been validated by the New England Journal of Medicine Catalyst. Providers choose Cadence for its integrated technology, clinical workflows, and measurable return on investment.