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© All Rights Reserved. ApplyBlast.com
SES Satellites
A Senior FPGA & ASIC System Architecture Engineer at SES designs and delivers advanced digital payload and radio unit solutions for secure satellite connectivity systems. The role involves defining architectures for RFSoC and AMD FPGA devices, managing technical strategies across multiple programs, and leading RTL design teams to ensure high-throughput communication standards.
We provide reliable and secure satellite and ground communications solutions. We push for breakthroughs in connectivity and their impact on people worldwide.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for SES Satellites.
SES Satellites didn’t post a salary, so this is our estimate from similar listings.
10% below the average for this role