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Senior Engineer, R2G Methodology and PD execution at SiFive - ApplyBlast

Senior Engineer, R2G Methodology and PD execution

SiFive

3 months ago

3.9 on Glassdoor

Bengaluru, Karnataka, India

Hybrid

Full Time

Senior

0 applicants

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About this role

A Senior Physical Design Engineer at SiFive executes and optimizes the RTL-to-GDS implementation flow for high-performance CPU cores. The role involves taking ownership of block-level implementation to drive Power, Performance, and Area (PPA) closure on leading-edge process nodes like N3/N2. This position utilizes automated, ML-enhanced methodologies and advanced tools to hit aggressive frequency and power targets within a collaborative team environment.

Responsibilities

Execute and optimize RTL-to-GDS implementation flow
Take end-to-end ownership of CPU sub-blocks
Drive block-level PPA closure using advanced techniques
Utilize ML tools for design space exploration
Develop and maintain Tcl Python scripts

Skills

Qualifications

Bachelor's Degree in Electrical Engineering

About SiFive

sifive.com

Headquarters

Santa Clara, California, United States

Company Size

501-1000 employees

Founded

2015

View Profile

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.