Altera
A Senior FPGA Compiler Engineer at Altera develops and optimizes routing algorithms within FPGA compiler toolchains to enhance performance and power efficiency for next-generation devices. This role involves designing graph-based optimization strategies, analyzing runtime scalability, and collaborating with architecture and hardware teams to improve routing convergence.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.