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© All Rights Reserved. ApplyBlast.com
Altera
A Senior FPGA Compiler Engineer at Altera develops and optimizes routing algorithms within the FPGA compiler toolchain to enhance performance, power efficiency, and usability for next-gen devices. The role requires deep expertise in EDA algorithms and graph-based optimization while collaborating with architecture and hardware teams to align routing strategies with device capabilities.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
31% above the average for this role