Senior Mask Layout Design Engineer

NVIDIA is seeking a Senior Mask Layout Design Engineer to join a dynamic team responsible for high-speed mixed-signal circuit designs. The role involves performing physical layout for various functions using Cadence tools and collaborating with ASIC and mixed-signal engineers to customize designs for VLSI products. The position requires extensive experience in mask design, tape-out experience with FinFET technology, and proficiency in analog circuit layout concepts in submicron CMOS technologies.