SiFive
The Senior Physical Design Engineer is responsible for executing and optimizing the RTL-to-GDS implementation flow for high-performance CPU cores at SiFive. This role involves taking ownership of block-level implementation and contributing to advanced design recipes to achieve PPA closure on leading-edge process nodes. The position focuses on high-quality technical execution, hands-on design closure, and utilizing automated, ML-enhanced methodologies to meet aggressive frequency and power targets.
Headquarters
Santa Clara, California, United States
Company Size
501-1000 employees
Founded
2015
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for SiFive.
SiFive didn’t post a salary, so this is our estimate from similar listings.
23% below the average for this role
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