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Senior Principal Digital Design Engineer at Astera Labs - ApplyBlast

Senior Principal Digital Design Engineer

Astera Labs

7 months ago

4.3 on Glassdoor

San Jose, CA

Hybrid

Full Time

Senior

0 applicants

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About this role

Astera Labs is seeking a Senior Principal Digital Design Engineer to lead the architecture and implementation of next-generation digital designs for AI infrastructure connectivity. The role involves defining micro-architecture strategies, guiding complex chip-level designs, and collaborating across various teams to deliver industry-leading products supporting protocols like PCIe Gen 6/7, CXL, Ethernet, and DDR4/DDR5.

Skills

Qualifications

BS in Electrical Engineering

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

View Profile

Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.