Delos Data
A Senior RTL Design Engineer at a Silicon Valley startup designs, implements, and delivers high-quality RTL for complex digital systems, focusing on performance, power, and area. The role involves translating architectural specifications into scalable microarchitectures and collaborating with architecture, verification, and physical design teams. The position requires strong hands-on experience with Verilog/SystemVerilog and digital design fundamentals.
Delos Data is a technology company building interconnect infrastructure purpose-built for AI inference, combining software, systems, and silicon expertise. Their flagship product, Nonstop AI™, enables large-scale GPU clusters with a one-hop, open architecture that improves how compute is distributed and memory is interconnected. They focus on scaling AI inference beyond traditional HPC and cloud approaches to deliver faster, more capable intelligence.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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