Senior Silicon Validation Methodology Engineer Low Power China Shanghai

The Senior Silicon Validation Methodology Engineer for Low Power at NVIDIA's Silicon Co-Design Group owns the department's low-power validation methodology across GPU, SoC, and CPU, from architecture to silicon to product. The role involves defining testing strategies, setting validation standards, and driving cross-functional consensus to improve validation workflows and tool investments. This position requires deep expertise in low-power architecture, silicon validation, and AI-enabled analysis to enhance quality and efficiency.