Senior SOC Timing Engineer
Altera
About this role
An SoC Timing Engineer focused on delivering end-to-end timing closure and signoff for FPGA/SoC and subsystem designs. The role partners closely with design, architecture, and physical design teams to ensure timing convergence through advanced analysis and constraint development. This position is based in Penang, Malaysia on a regular, full-time shift schedule.
Skills
Qualifications
About Altera
altera.comAltera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Salary
$168k – $225k
per year