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© All Rights Reserved. ApplyBlast.com
Altera
An SOC Timing Engineer working on timing closure and signoff for FPGA/SoC and subsystem designs at advanced process nodes. Based in Penang, Malaysia, the role sits within semiconductor physical design engineering supporting projects at 10nm and below.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
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