Senior /Staff AMS Layout Engineer-DPG-LPDDR

This role involves leading the custom analog and mixed-signal layout for critical LPDDR PHY blocks, ensuring robust operation across process, voltage, and temperature variations. The position requires expertise in high-speed interface layout, signal integrity management, and physical verification to achieve silicon-accurate performance. The engineer will collaborate cross-functionally to optimize power, performance, and area while mentoring team members and driving continuous improvement initiatives.