Senior / Staff Analog Design Engineer - High Speed SerDes

The Senior/Staff Analog Design Engineer - High Speed SerDes at Flux is responsible for architecting and implementing multi-lane SerDes interfaces that operate over 25 Gb/s per lane. This role involves designing and verifying transmit and receive paths, developing adaptive clock-data-recovery (CDR) loops, and ensuring robust performance across complex channels. The engineer will closely collaborate with cross-disciplinary teams, mentor junior staff, and leverage their expertise in high-speed mixed-signal design while utilizing advanced EDA tools and measurement techniques. Candidates should possess over seven years of experience in designing production high-speed SerDes and a strong understanding of signal integrity and adaptive equalization.