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marvellsemiconductor.com
A verification engineer at Marvell's Center of Excellence designs and executes verification plans for high-speed memory interfaces including DDR, LPDDR, and HBM. The role involves building UVM/System Verilog environments, creating test benches, and collaborating with architecture and design teams to ensure protocol compliance and coverage closure.
Headquarters
Santa Clara, California, United States
Company Size
1001-5000 employees
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for marvellsemiconductor.com.
23% above the average for this role