Senior / Staff Design Verification Engineer

A Senior Design Verification Engineer at SiFive ensures the functional correctness of complex, next-generation System-on-Chips (SoCs) and Intellectual Property (IPs). The role involves owning the entire verification lifecycle, from creating comprehensive test plans and developing environments using SystemVerilog and UVM to driving coverage closure and debugging complex issues. This position requires collaboration with design and architecture teams to deliver tape-out-ready solutions for data-intensive applications.