Senior Staff Engineer, Design Verification

As a SoC-level design verification engineer at Marvell, you will develop and maintain UVM testbench components to ensure design quality within complex system-on-chip architectures. You will analyze designs to create comprehensive test strategies, debug failures, and mentor junior engineers within the Custom Compute, Storage, and Automotive Business Unit. This role requires deep expertise in verification methodologies and collaboration with designers to achieve rigorous coverage goals.