Senior/Lead ASIC Emulation Engineer

The Senior/Lead ASIC Emulation Engineer drives the execution, verification, and validation of high-complexity network security processors and compute architectures on state-of-the-art emulation and FPGA prototyping platforms. This role bridges the gap between pre-silicon hardware design, firmware/software development, and post-silicon validation to ensure next-generation firewall products achieve industry-leading performance and reliability. The position involves defining emulation architecture, building scalable hybrid co-emulation environments, and accelerating pre-silicon software bring-up.