MatX
This role involves owning the electrical characterization of high-speed SerDes interfaces and power delivery networks for AI accelerator compute systems. The engineer will build and scale test automation infrastructure to cover thousands of channels while collaborating with hardware teams to validate designs from concept through production. The position focuses on optimizing system performance through rigorous testing, data analysis, and design feedback.
MatX designs high-throughput chips and systems purpose-built for large transformer AI models, with their MatX One chip delivering leading FLOPS/mm2, low-latency decode, and the most scale-up interconnect of any announced product. Supporting clusters of hundreds of thousands of chips, MatX targets training, RL, and inference workloads for large dense and MoE models with no upper limit on model size, serving the large model needs of frontier labs. MatX provides a programming model that gives users direct hardware control, with weights typically in SRAM for low latency and KVs in HBM for long-context support.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for MatX.
AI Chip Startup MatX Raises $500 Million to Compete With Nvidia
2 weeks ago