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Silicon Verification Engineer at MatX - ApplyBlast

Silicon Verification Engineer

MatX

3 months ago

Mountain View, California, United States

Hybrid

Full Time

Senior

0 applicants

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About this role

MatX is seeking silicon verification engineers to develop high‑performance, sustainable GenAI silicon across compute, memory management, and high‑speed connectivity. The role involves creating verification methodologies, testbenches, and driving verification closure through design freeze and tapeout milestones.

Responsibilities

Contribute to verification methodology across blocks and system level
Own verification execution and create testbenches to achieve coverage closure
Plan and drive reviews on verification test plans and milestone sign‑offs

Skills

About MatX

matx.com

Headquarters

Mountain View, California, United States

Company Size

1-10 employees

View Profile

MatX designs high-throughput chips and systems purpose-built for large transformer AI models, with their MatX One chip delivering leading FLOPS/mm2, low-latency decode, and the most scale-up interconnect of any announced product. Supporting clusters of hundreds of thousands of chips, MatX targets training, RL, and inference workloads for large dense and MoE models with no upper limit on model size, serving the large model needs of frontier labs. MatX provides a programming model that gives users direct hardware control, with weights typically in SRAM for low latency and KVs in HBM for long-context support.