SOC Clock Distribution Engineer

A Physical Design Engineer on NVIDIA's System-On-Chip (SOC) team focused on optimizing SOC design, physical integration, and chip build for high-complexity GPU and networking chips. The role centers on enabling efficient clock distribution and SOC-level design solutions while collaborating across Physical Design, CAD, Package, Software, DFT and RTL teams. This position offers the chance to work on large-scale chips with an emphasis on quality and delivery.