SOC Micro-architecture & RTL Design Lead

MatX(12 days ago)

HybridFull TimeSenior$200,000 - $250,000Engineering

About this role

MatX is developing comprehensive solutions from silicon to systems for training and deploying large machine learning workloads for artificial general intelligence. The company seeks a SOC Micro-architecture and RTL Design Lead to spearhead their silicon design initiatives, leading cross-functional teams to deliver high-performance, sustainable silicon products.

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Required Skills

SystemVerilog
Python
C++
Bluespec
RTL Design
Micro-architecture
ASICs
SOC
High-Performance Computing
Memory Management

About MatX

matx.com

MatX designs high-throughput chips and systems purpose-built for large transformer AI models, dedicating every transistor to maximizing performance for large-scale training and production inference. They prioritize performance-per-dollar and scale-out—supporting clusters of hundreds of thousands of chips and targeting workloads from ~7B up to 10T-class models, with competitive latency (e.g., <10ms/token for 70B-class). MatX provides low-level hardware control for expert users and aims to dramatically reduce cost and time-to-model so researchers and startups can train and serve very large models affordably and sooner.

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