SoC Verification Engineer

This role focuses on developing test plans and verification environments for complex System-on-Chip (SoC) designs, including random and directed testing in RTL and gate-level simulation environments. The position involves collaborating with customers and IP suppliers to validate requirements, debug pre-silicon and post-silicon issues, and support the innovation of future High Bandwidth Memory (HBM) solutions. The engineer is responsible for ensuring high-quality architectural specifications and identifying opportunities to improve performance and reduce power consumption.