FA
The Sr Analog Wafer Level ATE Test Engineer supports existing IC ATE development and production, focusing on analog wafer sort testing and STDF data handling. This role involves hands-on experience with NPI test development, yield analysis, and debugging, while collaborating with external vendors and cross-functional teams. The position requires strong analytical skills to interpret data and improve production efficiency in a high-performance ASIC environment.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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