Sr Design Engineering Architect
BETA CAE Greece(1 year ago)
About this role
The RTL Design Engineer at Cadence is focused on Interface Controller IP development, specifically working on PCIe architecture with ARM CPU subsystem architecture. The role involves designing and supporting the RTL of various IP solutions, integrating new features, and ensuring compliance with verification and design guidelines.
Required Skills
- RTL Design
- Verilog
- System Verilog
- UVM
- PCIe
- IP Development
Qualifications
- BE/BTech
- ME/MTech
- Electrical
- Electronics
- VLSI
About BETA CAE Greece
beta-cae.comBETA CAE Systems is a leading provider of advanced simulation software solutions that cater to the needs of engineers and researchers in various fields, including automotive, aerospace, and manufacturing. With a comprehensive suite of tools for computer-aided engineering (CAE), BETA empowers users to effectively perform tasks related to finite element analysis (FEA), computational fluid dynamics (CFD), and process automation. Recently acquired by Cadence, the company continues to innovate in areas such as machine learning and predictive analysis, bolstering its commitment to enhancing product design and simulation accuracy.
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