Sr DFT Engineer (eInfochips Inc)

The Senior DFT Engineer at eInfochips designs and implements design-for-test (DFT) strategies including scan, MBIST, and ATPG for complex SoC and block-level designs. This role involves collaborating with synthesis, STA, and physical design teams to resolve issues while working with test engineers to validate silicon. The position emphasizes expertise in industry standards, debugging capabilities, and scripting automation within a global semiconductor engineering environment.