Sr Engineer, NAND CMOS DTOC

This role drives co-optimization of CMOS devices, process integration, and interconnects to meet Power, Performance, Area, and Cost (PPAC) targets within Micron's NAND technology roadmap. The position involves translating product needs into technology specifications, defining design rules, and mentoring colleagues to ensure reliable transistor development and manufacturing performance. Collaboration with Design, Device, Modeling, and Manufacturing teams is essential to achieve strategic technology objectives.