Sr. Staff Engineer, ASIC Verification - AI/HPC SOCs

As a Senior Verification Engineer at Marvell, you will develop and enhance verification environments and strategies for complex custom System-on-Chip (SoC) architectures within the Data Center Engineering Business Unit. This role involves defining testing methodologies using System Verilog and UVM, collaborating with designers to debug failures, and ensuring functional correctness of AI/HPC subsystems. You will contribute to the full lifecycle development of memory, AI, and network processing IP from validation through production ramp-up.