Staff CPU Design Verification Engineer

The Staff CPU Design Verification Engineer at SiFive owns the verification strategy and execution for complex out-of-order processor and cache/memory subsystems. This role involves defining methodologies, leading test plan creation, and driving verification of speculative execution, memory ordering, and coherence features from architecture through tape-out. The position requires expertise in SystemVerilog, UVM, and OOO CPU micro-architecture to ensure comprehensive coverage and quality.