Staff Engineer, Design Verification

Analog Devices(1 month ago)

Valencia, Spain, SpainOnsiteFull TimeSenior$170,843 - $228,718 (estimated)Engineering

About this role

A Design Verification Engineer at Analog Devices based in Valencia, Spain will define and implement verification solutions for mixed-signal ICs across the full development cycle. The role supports verification planning, testbench and methodology development, and collaboration with analog co-sim, firmware, and cross-functional teams to deliver products to customers.

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Required Skills

Design Verification
UVM
System Verilog
Formal Verification
Coverage Analysis
Testbench Development
Debugging
Python
Tcl
Perl

+4 more

Qualifications

Bachelor's Degree in Electronic Engineering
Master's Degree in Electronic Engineering

About Analog Devices

www.analog.com

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