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Staff System Validation Engineer at SiFive - ApplyBlast

Staff System Validation Engineer

SiFive

10 months ago

3.9 on Glassdoor

Bengaluru, Karnataka, India

Onsite

Full Time

Senior

0 applicants

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About this role

The RISC-V System Engineer (FPGA Execution) on the CoreIP team will develop, deploy, and support emulation and FPGA environments to enable silicon and software bring-up. The role involves collaborating with cross-functional teams to define emulation test strategy and frameworks, implement test plans, and debug complex hardware, software, and silicon design issues. The engineer will establish hardware and software readiness on emulation platforms for silicon validation.

Skills

About SiFive

sifive.com

Headquarters

Santa Clara, California, United States

Company Size

501-1000 employees

Founded

2015

View Profile

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.