Staff System Validation Engineer

SiFive(2 months ago)

Hsinchu, TaiwanOnsiteFull TimeSenior$146,957 - $198,553 (estimated)Engineering

About this role

The RISC-V System Engineer (FPGA Execution) in the CoreIP team will develop, deploy, and support emulation and FPGA environments to enable silicon and software bring-up. The role works cross-functionally to define emulation test strategies and frameworks, implement test plans, and debug complex hardware, software, and silicon issues. It focuses on preparing FPGA platforms and emulation readiness for high-quality processor and SoC validation.

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Required Skills

FPGA
SoC Architecture
Processor Debugging
Linux Development
Emulation
Design Verification
System Validation
Test Planning
Scala
Chisel

About SiFive

sifive.com

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.

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