Tech Lead Design Engineer
Astera Labs(30 days ago)
About this role
Astera Labs is expanding its R&D center in Israel and is seeking a Tech Lead VLSI Design Engineer to design digital blocks for advanced connectivity projects, supporting AI infrastructure at scale. The role involves leading chip design from high-level concepts through implementation, collaborating across teams, and contributing to innovative semiconductor development.
Required Skills
- Verilog
- SystemVerilog
- Synthesis
- Timing
- Power
- Debugging
- RTL
- Power Management
- Python
- Connectivity
About Astera Labs
asteralabs.comAstera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
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