Renesas 瑞萨电子
The Senior Wafer Fab Yield Engineer drives systematic yield improvement across semiconductor wafer fabrication by analyzing manufacturing, metrology, and test data to identify yield-loss mechanisms and root causes. This role leads cross-functional initiatives to implement corrective actions, optimize process windows, and resolve complex manufacturing problems. The position also involves mentoring engineers, supporting new-product introductions, and developing structured experiments to enhance fab-wide yield-analysis methods.
作为全球领先的微控制器、模拟功率器件和SoC产品供应商,瑞萨电子通过提供可靠的创新嵌入式设计,与您共创无限未来。
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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Renesas 瑞萨电子 didn’t post a salary, so this is our estimate from similar listings.