ASIC Design Verification Engineer
Broadcom(2 days ago)
About this role
This role involves verifying new designs using industry-proven methodologies like constrained random verification with SystemVerilog and UVM, on cutting-edge PCIe and host interface technologies. The position offers opportunities for technical leadership and working on innovative, high-performance Ethernet products.
Required Skills
- SystemVerilog
- UVM
- VCS
- Perl
- Python
- OOP
- Constrained Random
- Verification
- Data Path
- PCIe
Qualifications
- BS in Electrical Engineering
- MS in Electrical Engineering
About Broadcom
broadcom.comBroadcom Inc. is a global technology leader that designs, develops, and supplies a comprehensive range of semiconductor and enterprise software solutions. The company's offerings include a variety of security solutions and products aimed at enhancing connectivity across various sectors. With a commitment to innovation and quality, Broadcom is at the forefront of driving technological advancements that connect everything, from data centers to mobile devices.
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