ASIC DV Engineer (TCP02 )
Hewlett Packard Enterprise(2 days ago)
About this role
Hewlett Packard Enterprise is looking for an ASIC DV Engineer to develop verification environments and test suites for complex ASICs, using SystemVerilog and UVM methodologies. The role involves verifying large ASIC blocks, working closely with logic designers, and scripting to enhance verification processes.
Required Skills
- SystemVerilog
- UVM
- Verilog
- Python
- Perl
- ASIC Verification
- Debugging
- Networking Protocols
- VCS
- Constraint-Random Verification
Qualifications
- BS in Electrical Engineering or Computer Science
- 3+ years of experience
About Hewlett Packard Enterprise
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