ASIC DFT DV Technical Lead

The ASIC DFT DV Technical Lead role involves collaborating with front-end RTL and backend physical design teams to understand chip architecture and drive high-quality DFT verification. The position requires developing detailed test plans and test benches to verify comprehensive Design-for-Test architecture, supporting ATE screening, in-system test, debug, and diagnostics needs. The role also includes mentoring DFT DV engineers and providing technical leadership across projects.