ApplyBlast uses AI to match you with the right jobs, tailor your resume and cover letter, and apply automatically so you can land your dream job faster.

Features

Auto Apply Resume Optimizer Cover Letter Optimizer Interview Prep

Company

Social Media

Need Help?

team@applyblast.com

ASIC front-end verification engineer at Hewlett Packard Enterprise - ApplyBlast

ASIC front-end verification engineer

Hewlett Packard Enterprise

4 months ago

4.8 on Glassdoor

Bengaluru, Karnataka, India

Onsite

Full Time

Senior

0 applicants

View Job Listing

Apply to 100+ jobs

About this role

This onsite role involves designing, analyzing, and verifying VLSI components and hardware systems for ASICs. The engineer will architect verification environments using SystemVerilog and UVM, develop complex test suites, and collaborate with designers to resolve bugs before tape-out.

Responsibilities

Architect block level verification environments using SystemVerilog and UVM methodology
Develop and deliver comprehensive verification suites for large ASIC blocks
Analyze code and functional coverage to sign off designs for tape-out
Collaborate with logic designers to identify and resolve hardware bugs
Create Perl, Python, or shell scripts to improve verification infrastructure

Skills

Qualifications

MSEE

About Hewlett Packard Enterprise

hpe.com

Headquarters

The Woodlands, Texas, United States

Company Size

10001+ employees

Founded

1939

View Profile

Discover HPE edge-to-cloud, enterprise compute IT, data, and security solutions. Learn how HPE empowers digital transformation through AI and sustainability.