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ASIC Verification Engineer at Hewlett Packard Enterprise - ApplyBlast

ASIC Verification Engineer

Hewlett Packard Enterprise

3 months ago

4.8 on Glassdoor

Bengaluru, Karnātaka, India

Hybrid

Full Time

Senior

0 applicants

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About this role

As an ASIC Verification Engineer at HPE's Silicon Systems Technology Group, you will verify next-generation ASICs for core routers, switches, and firewalls. You will architect and develop block-level verification environments using SystemVerilog and UVM, collaborate with designers to resolve bugs, and utilize scripting languages to improve verification infrastructure.

Responsibilities

Architect and develop block-level verification environments using SystemVerilog and UVM
Define and deliver verification suites for complex ASIC subsystems and full-chips
Verify large ASIC blocks independently and sign off for tape-out
Collaborate with logic designers to resolve bugs and support software development
Develop Perl, Python, and shell scripts to enhance verification infrastructure

Skills

Qualifications

MSEE DegreeBSEE Degree3+ Years of Experience

About Hewlett Packard Enterprise

hpe.com

Headquarters

The Woodlands, Texas, United States

Company Size

10001+ employees

Founded

1939

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