Design Verification Engineer, Senior Staff
Marvell Technology(5 months ago)
About this role
Marvell is seeking a verification engineer to develop the architecture for verification environments and collaborate with architects and RTL engineers. The role involves writing tests in various programming languages for ASIC and SoC design blocks and debugging failures in test environments.
Required Skills
- Verification Environment
- SystemVerilog
- C++
- Debugging
- Digital Design
Qualifications
- Bachelor’s Degree in Computer Science
- Electrical Engineering
About Marvell Technology
marvell.comDesigned for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.
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