Staff SoC Verification Engineer
Innatera(1 month ago)
About this role
A Staff SoC Verification Engineer at Innatera is responsible for developing and maintaining SystemVerilog/UVM-based verification environments for neuromorphic processors at both module and SoC levels. The role involves writing test sequences, managing functional coverage models, and debugging simulation results, while applying modern EDA tools to enhance verification methodologies. Additionally, the engineer will lead a small team, collaborate cross-functionally, and ensure quality assurance and design-test alignment across chip releases.
Required Skills
- SystemVerilog
- UVM
- Verification Environments
- Test Sequences
- Functional Coverage
- Debugging
- Simulation Results
- Constrained-Random Generation
- EDA Tools
- Automation
+24 more
About Innatera
innatera.comInnatera is a technology company specializing in ultra-low power neuromorphic processors that enable advanced pattern recognition for sensor applications. Their innovative Spiking Neural Processor mimics brain-like processing mechanisms, allowing for efficient and rapid data interpretation with minimal energy consumption. By leveraging proprietary analog-mixed signal computing architecture, Innatera's solutions provide significant improvements in latency and privacy for various industrial applications. The company is committed to pushing the boundaries of sensing technology, enhancing the capabilities of devices in power-limited environments.
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