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Design Verification Engineer, Staff at Astera Labs - ApplyBlast

Design Verification Engineer, Staff

Astera Labs

7 months ago

4.3 on Glassdoor

San Jose, CA

Onsite

Full Time

Senior

0 applicants

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About this role

Astera Labs is looking for a Staff Design Verification Engineer to join their team, focusing on the functional verification of AI connectivity ASICs supporting various high-speed protocols. The role involves full verification lifecycle responsibilities and collaboration across engineering teams in a fast-growing company dedicated to AI infrastructure connectivity.

Skills

Qualifications

BS in Electrical Engineering

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

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Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.