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© All Rights Reserved. ApplyBlast.com
Altera
A Senior Design Verification Engineer/Lead on Altera's FPGA IP team responsible for driving verification quality for FPGA interface IPs. The role focuses on ensuring production-ready, bug-free silicon through deep expertise in advanced DV methodologies, tools, and interconnect/serial protocols such as Ethernet and PCIe, while collaborating across architecture, design, and software teams.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.