Altera
Altera is seeking an FPGA Compiler Engineer to develop and optimize routing algorithms within the company's compiler toolchain. This role focuses on enhancing performance, power efficiency, and usability for next-generation FPGA devices through graph-based optimization and algorithm design. Candidates will collaborate closely with architecture, synthesis, and hardware teams to align routing strategies with device capabilities.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
20% below the average for this role