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Altera
This role involves developing logic design, RTL coding, and simulation for FPGAs to create cell libraries, functional units, and IP blocks for full chip integration. The position requires defining architecture and microarchitecture features, creating prototypes, and delivering software models for device-level bring-up. The engineer will also qualify designs to meet power, performance, and area goals while ensuring design verification and correctness.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
34% below the average for this role