Altera
A Senior Silicon Validation Engineer leads device-level and IP-level validation for FPGA configuration, security, and high-performance processor (HPS) subsystems. The role involves developing comprehensive validation strategies, executing security feature tests, and performing system bring-up to ensure robustness and integrity for next-generation devices. You will collaborate closely with architecture, design, and firmware teams to influence future secure FPGA products while driving innovation in validation methodologies.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.