Altera
This role involves owning high-speed I/O validation strategies and developing standardized methodologies for scalable testing. The position requires performing post-silicon functional and electrical validation using advanced lab equipment while collaborating with hardware, firmware, and design teams on channel implementation and debug. Candidates will focus on high-speed analog I/O and PHY design for interfaces like DDR, LPDDR, and MIPI.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
36% below the average for this role