Full-Chip Physical Verification Engineer

Celero Communications is seeking a Full-Chip Physical Verification Engineer to join the Physical Design team and deliver complex digital blocks and full-chip implementations in advanced process technologies. The role involves owning all aspects of physical verification execution on advanced TSMC nodes, ensuring design quality, manufacturability, and tapeout readiness. The ideal candidate will collaborate with analog and physical design teams to resolve verification challenges and meet aggressive performance and schedule objectives.