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© All Rights Reserved. ApplyBlast.com
Celero Inc
Celero Communications is seeking a High-Speed Analog Layout Design Engineer to lead the layout design of complex analog and mixed-signal IP blocks for advanced optical communication systems. This hands-on technical role involves collaborating with circuit designers, mentoring junior engineers, and ensuring first-pass silicon success through rigorous verification and signoff processes. The position offers the opportunity to contribute to cutting-edge chip development in a fast-paced, high-growth semiconductor startup environment.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
15% above the average for this role